Cameron Otsuka

Necessity Is the Mother of Huawei's Invention

Metadata
  • Description: Will Chinese chipmakers innovate themselves around US sanctions and re-level the AI lab race?
  • Publication: Inference Draft 2026-22
  • Published:
  • Last Modified:
  • Type: newsletter
  • Tags: ai
  • POSSE: Substack 
Abstract circuit board spiral sculpture

Chip microarchitectures are often talked about as the arbiter of performance: Nvidia’s chip succession from Ampere to its current Rubin Ultra offerings are compared in PFLOPs of performance1. Less talked about are all of the surrounding parts and optimizations that are needed to make these high performance chips usable.

PC enthusiasts may remember Nvidia’s GeForce GT 1030 debacle, where two versions of the graphics card were manufactured using the same GPU and name, but swapping its GDDR5 memory down to DDR4. It led to a reviewer calling them the “GT 1030” and the “GT 1030 Bad Edition” to differentiate.

So in today’s world where access to the most advanced chip manufacturing processes are geopolitical issues, finding a way to make a competitive package on last-generation tooling is more necessary than ever. Despite the sanctions, Chinese labs have managed to stay within 8 months of the frontier.

Comparison of aggregate capabilities over time of the most capable publicly released U.S. and PRC models according to a suite of benchmarks covering five domains.

From Huawei (emphasis mine):

…[The Tau (τ) Scaling Law] aims to systematically shorten the time constant τ in order to drive up performance, energy efficiency, and transistor density at each level…

The Kirin chips scheduled to launch in Fall 2026 will be the first ever to adopt the LogicFolding architecture, which will considerably enhance the chips’ performance. By 2031, the high-end chips HUAWEI designs based on the τ Scaling Law are expected to feature a transistor density that is equivalent to 14 Å (1.4 nm) processes.

I don’t pretend to be an expert on chip design, but Huawei Central compares the Kirin claims to prior improvements:

The 2026 version of the Kirin chip will consist of 238 mtr/mm2, or 240 million transistors per square millimeter, a 53.5% jump compared to the conventional 2D chip design. This is around 40 million short of TSMC’s 3nm chip’s transistor density.

It is worth mentioning that TSMC and Intel’s transistor density improvement for each generation of process after 10nm is only around 20%-30%, and after 2nm, TSMC only saw a density improvement of around 10%.

If Huawei is able to use the LogicFolding design from its mobile-targeted Kirin chips with its Ascend AI accelerators and along with domestically-developed DUV machines coming online in the next year, we may soon be looking at frontier-competitive Chinese chips. I’d watch for where the next red dot lands on the capability chart to see whether the sanctions will have a lasting impact on China.


Mine Print Hash

Matt and I check in on Bessent’s plan to “monetize the asset side of the US balance sheet” by tracking progress-to-date across several executive orders, policy changes, and congressional acts. What we find is a steady march towards accomplishing this goal, with stablecoins playing a key role in the strategy while internationally, there are signs of differing openness to onboarding onto dollar stablecoin monetary rails.


Open Threads

Nation-states continue to exert their influence on AI development:

Inference usage and costs:

Footnotes

  1. A petaflop, measuring floating point operations per second. ↩︎